Commit 53e41c8f authored by Zhuoyu Zhang's avatar Zhuoyu Zhang
Browse files

4.4-t

parent 5f46d08a
E:/3210105816/digitalsystemlabs/SourceProgram/lab5_combination/src/full_adder_tb.v {1 {vlog -work work -vopt -stats=none E:/3210105816/digitalsystemlabs/SourceProgram/lab5_combination/src/full_adder_tb.v
Model Technology ModelSim SE-64 vlog 10.4 Compiler 2014.12 Dec 3 2014
-- Compiling module full_adder_tb_v
Top level modules:
full_adder_tb_v
} {} {}} E:/3210105816/digitalsystemlabs/lab_5/src/full_adder.v {1 {vlog -work work -vopt -stats=none E:/3210105816/digitalsystemlabs/lab_5/src/full_adder.v
Model Technology ModelSim SE-64 vlog 10.4 Compiler 2014.12 Dec 3 2014
-- Compiling module full_adder
Top level modules:
full_adder
} {} {}}
......@@ -8,5 +8,5 @@ module full_adder (
xor(s,s1,ci);
and(c1,a,b);
and(c2,s1,ci);
xor(co,c2,c1);
xor(coa,c2,c1);
endmodule
\ No newline at end of file
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