From d45138511e7ccf8f1e51381e334d1a5feeb71236 Mon Sep 17 00:00:00 2001
From: Tannin Rachel <2024326451@qq.com>
Date: Sun, 14 May 2023 00:53:41 +0800
Subject: [PATCH] =?UTF-8?q?=E8=BD=AF=E4=BB=B6I2C=E6=8E=A7=E5=88=B6MPU6050(?=
=?UTF-8?q?=E6=9C=AA=E5=AE=8C=E6=88=90=E7=89=88)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
---
.cproject | 201 +
.mxproject | 31 +
.project | 33 +
.settings/language.settings.xml | 25 +
.settings/stm32cubeide.project.prefs | 4 +
.vs/launch.vs.json | 26 +
.vscode/extensions.json | 7 +
.vscode/launch.json | 29 +
.vscode/settings.json | 29 +
.vscode/tasks.json | 15 +
CMakeLists.txt | 8 +
CMakePresets.json | 53 +
Core/Inc/gpio.h | 49 +
Core/Inc/i2c.h | 42 +
Core/Inc/main.h | 72 +
Core/Inc/mpu6050.h | 92 +
Core/Inc/start.h | 14 +
Core/Inc/stm32f1xx_hal_conf.h | 391 +
Core/Inc/stm32f1xx_it.h | 66 +
Core/Inc/tim.h | 54 +
Core/Inc/usart.h | 52 +
Core/Src/gpio.c | 67 +
Core/Src/i2c.cpp | 249 +
Core/Src/main.c | 180 +
Core/Src/mpu6050.cpp | 274 +
Core/Src/start.cpp | 48 +
Core/Src/stm32f1xx_hal_msp.c | 85 +
Core/Src/stm32f1xx_it.c | 203 +
Core/Src/syscalls.c | 155 +
Core/Src/sysmem.c | 79 +
Core/Src/system_stm32f1xx.c | 406 +
Core/Src/tim.c | 143 +
Core/Src/usart.c | 127 +
Core/Startup/startup_stm32f103c8tx.s | 364 +
Debug/Core/Src/gpio.d | 55 +
Debug/Core/Src/gpio.o | Bin 0 -> 748868 bytes
Debug/Core/Src/gpio.su | 1 +
Debug/Core/Src/i2c.d | 55 +
Debug/Core/Src/i2c.o | Bin 0 -> 754236 bytes
Debug/Core/Src/i2c.su | 3 +
Debug/Core/Src/main.d | 62 +
Debug/Core/Src/main.o | Bin 0 -> 751148 bytes
Debug/Core/Src/main.su | 3 +
Debug/Core/Src/mpu6050.d | 57 +
Debug/Core/Src/mpu6050.o | Bin 0 -> 820704 bytes
Debug/Core/Src/mpu6050.su | 9 +
Debug/Core/Src/start.d | 58 +
Debug/Core/Src/start.o | Bin 0 -> 832892 bytes
Debug/Core/Src/start.su | 3 +
Debug/Core/Src/stm32f1xx_hal_msp.d | 54 +
Debug/Core/Src/stm32f1xx_hal_msp.o | Bin 0 -> 749032 bytes
Debug/Core/Src/stm32f1xx_hal_msp.su | 1 +
Debug/Core/Src/stm32f1xx_it.d | 56 +
Debug/Core/Src/stm32f1xx_it.o | Bin 0 -> 750656 bytes
Debug/Core/Src/stm32f1xx_it.su | 9 +
Debug/Core/Src/subdir.mk | 66 +
Debug/Core/Src/syscalls.d | 1 +
Debug/Core/Src/syscalls.o | Bin 0 -> 76736 bytes
Debug/Core/Src/syscalls.su | 18 +
Debug/Core/Src/sysmem.d | 1 +
Debug/Core/Src/sysmem.o | Bin 0 -> 46424 bytes
Debug/Core/Src/sysmem.su | 1 +
Debug/Core/Src/system_stm32f1xx.d | 53 +
Debug/Core/Src/system_stm32f1xx.o | Bin 0 -> 750168 bytes
Debug/Core/Src/system_stm32f1xx.su | 2 +
Debug/Core/Src/tim.d | 55 +
Debug/Core/Src/tim.o | Bin 0 -> 756228 bytes
Debug/Core/Src/tim.su | 4 +
Debug/Core/Src/usart.d | 55 +
Debug/Core/Src/usart.o | Bin 0 -> 754652 bytes
Debug/Core/Src/usart.su | 4 +
Debug/Core/Startup/startup_stm32f103c8tx.d | 2 +
Debug/Core/Startup/startup_stm32f103c8tx.o | Bin 0 -> 5208 bytes
Debug/Core/Startup/subdir.mk | 27 +
.../STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d | 54 +
.../STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o | Bin 0 -> 761796 bytes
.../STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su | 25 +
.../Src/stm32f1xx_hal_cortex.d | 54 +
.../Src/stm32f1xx_hal_cortex.o | Bin 0 -> 765028 bytes
.../Src/stm32f1xx_hal_cortex.su | 29 +
.../Src/stm32f1xx_hal_dma.d | 54 +
.../Src/stm32f1xx_hal_dma.o | Bin 0 -> 760196 bytes
.../Src/stm32f1xx_hal_dma.su | 13 +
.../Src/stm32f1xx_hal_exti.d | 54 +
.../Src/stm32f1xx_hal_exti.o | Bin 0 -> 754672 bytes
.../Src/stm32f1xx_hal_exti.su | 9 +
.../Src/stm32f1xx_hal_flash.d | 54 +
.../Src/stm32f1xx_hal_flash.o | Bin 0 -> 757748 bytes
.../Src/stm32f1xx_hal_flash.su | 14 +
.../Src/stm32f1xx_hal_flash_ex.d | 54 +
.../Src/stm32f1xx_hal_flash_ex.o | Bin 0 -> 760836 bytes
.../Src/stm32f1xx_hal_flash_ex.su | 16 +
.../Src/stm32f1xx_hal_gpio.d | 54 +
.../Src/stm32f1xx_hal_gpio.o | Bin 0 -> 756096 bytes
.../Src/stm32f1xx_hal_gpio.su | 8 +
.../Src/stm32f1xx_hal_gpio_ex.d | 54 +
.../Src/stm32f1xx_hal_gpio_ex.o | Bin 0 -> 749420 bytes
.../Src/stm32f1xx_hal_gpio_ex.su | 3 +
.../Src/stm32f1xx_hal_i2c.d | 54 +
.../Src/stm32f1xx_hal_i2c.o | Bin 0 -> 832056 bytes
.../Src/stm32f1xx_hal_i2c.su | 82 +
.../Src/stm32f1xx_hal_pwr.d | 54 +
.../Src/stm32f1xx_hal_pwr.o | Bin 0 -> 758156 bytes
.../Src/stm32f1xx_hal_pwr.su | 18 +
.../Src/stm32f1xx_hal_rcc.d | 54 +
.../Src/stm32f1xx_hal_rcc.o | Bin 0 -> 762504 bytes
.../Src/stm32f1xx_hal_rcc.su | 15 +
.../Src/stm32f1xx_hal_rcc_ex.d | 54 +
.../Src/stm32f1xx_hal_rcc_ex.o | Bin 0 -> 752612 bytes
.../Src/stm32f1xx_hal_rcc_ex.su | 3 +
.../Src/stm32f1xx_hal_tim.d | 54 +
.../Src/stm32f1xx_hal_tim.o | Bin 0 -> 841340 bytes
.../Src/stm32f1xx_hal_tim.su | 119 +
.../Src/stm32f1xx_hal_tim_ex.d | 54 +
.../Src/stm32f1xx_hal_tim_ex.o | Bin 0 -> 785804 bytes
.../Src/stm32f1xx_hal_tim_ex.su | 42 +
.../Src/stm32f1xx_hal_uart.d | 54 +
.../Src/stm32f1xx_hal_uart.o | Bin 0 -> 805456 bytes
.../Src/stm32f1xx_hal_uart.su | 62 +
.../STM32F1xx_HAL_Driver/Src/subdir.mk | 69 +
Debug/makefile | 109 +
Debug/objects.list | 28 +
Debug/objects.mk | 9 +
Debug/pjs_spoon.elf | Bin 0 -> 1031252 bytes
Debug/pjs_spoon.list | 8128 ++++++++++++
Debug/pjs_spoon.map | 4548 +++++++
Debug/sources.mk | 37 +
.../Device/ST/STM32F1xx/Include/stm32f103xb.h | 10240 ++++++++++++++++
.../Device/ST/STM32F1xx/Include/stm32f1xx.h | 273 +
.../ST/STM32F1xx/Include/system_stm32f1xx.h | 96 +
Drivers/CMSIS/Device/ST/STM32F1xx/LICENSE.txt | 6 +
Drivers/CMSIS/Include/cmsis_armcc.h | 865 ++
Drivers/CMSIS/Include/cmsis_armclang.h | 1869 +++
Drivers/CMSIS/Include/cmsis_compiler.h | 266 +
Drivers/CMSIS/Include/cmsis_gcc.h | 2085 ++++
Drivers/CMSIS/Include/cmsis_iccarm.h | 935 ++
Drivers/CMSIS/Include/cmsis_version.h | 39 +
Drivers/CMSIS/Include/core_armv8mbl.h | 1918 +++
Drivers/CMSIS/Include/core_armv8mml.h | 2927 +++++
Drivers/CMSIS/Include/core_cm0.h | 949 ++
Drivers/CMSIS/Include/core_cm0plus.h | 1083 ++
Drivers/CMSIS/Include/core_cm1.h | 976 ++
Drivers/CMSIS/Include/core_cm23.h | 1993 +++
Drivers/CMSIS/Include/core_cm3.h | 1941 +++
Drivers/CMSIS/Include/core_cm33.h | 3002 +++++
Drivers/CMSIS/Include/core_cm4.h | 2129 ++++
Drivers/CMSIS/Include/core_cm7.h | 2671 ++++
Drivers/CMSIS/Include/core_sc000.h | 1022 ++
Drivers/CMSIS/Include/core_sc300.h | 1915 +++
Drivers/CMSIS/Include/mpu_armv7.h | 270 +
Drivers/CMSIS/Include/mpu_armv8.h | 333 +
Drivers/CMSIS/Include/tz_context.h | 70 +
Drivers/CMSIS/LICENSE.txt | 201 +
.../Inc/Legacy/stm32_hal_legacy.h | 4334 +++++++
.../STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h | 357 +
.../Inc/stm32f1xx_hal_cortex.h | 408 +
.../Inc/stm32f1xx_hal_def.h | 211 +
.../Inc/stm32f1xx_hal_dma.h | 455 +
.../Inc/stm32f1xx_hal_dma_ex.h | 275 +
.../Inc/stm32f1xx_hal_exti.h | 318 +
.../Inc/stm32f1xx_hal_flash.h | 325 +
.../Inc/stm32f1xx_hal_flash_ex.h | 783 ++
.../Inc/stm32f1xx_hal_gpio.h | 306 +
.../Inc/stm32f1xx_hal_gpio_ex.h | 892 ++
.../Inc/stm32f1xx_hal_pwr.h | 385 +
.../Inc/stm32f1xx_hal_rcc.h | 1375 +++
.../Inc/stm32f1xx_hal_rcc_ex.h | 1905 +++
.../Inc/stm32f1xx_hal_tim.h | 2154 ++++
.../Inc/stm32f1xx_hal_tim_ex.h | 261 +
.../Inc/stm32f1xx_hal_uart.h | 915 ++
.../Inc/stm32f1xx_ll_bus.h | 1012 ++
.../Inc/stm32f1xx_ll_cortex.h | 638 +
.../Inc/stm32f1xx_ll_dma.h | 1958 +++
.../Inc/stm32f1xx_ll_exti.h | 886 ++
.../Inc/stm32f1xx_ll_gpio.h | 2341 ++++
.../Inc/stm32f1xx_ll_pwr.h | 437 +
.../Inc/stm32f1xx_ll_rcc.h | 2309 ++++
.../Inc/stm32f1xx_ll_system.h | 575 +
.../Inc/stm32f1xx_ll_tim.h | 3890 ++++++
.../Inc/stm32f1xx_ll_usart.h | 2569 ++++
.../Inc/stm32f1xx_ll_utils.h | 270 +
Drivers/STM32F1xx_HAL_Driver/LICENSE.txt | 6 +
.../STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c | 607 +
.../Src/stm32f1xx_hal_cortex.c | 503 +
.../Src/stm32f1xx_hal_dma.c | 897 ++
.../Src/stm32f1xx_hal_exti.c | 553 +
.../Src/stm32f1xx_hal_flash.c | 964 ++
.../Src/stm32f1xx_hal_flash_ex.c | 1124 ++
.../Src/stm32f1xx_hal_gpio.c | 586 +
.../Src/stm32f1xx_hal_gpio_ex.c | 126 +
.../Src/stm32f1xx_hal_pwr.c | 618 +
.../Src/stm32f1xx_hal_rcc.c | 1400 +++
.../Src/stm32f1xx_hal_rcc_ex.c | 860 ++
.../Src/stm32f1xx_hal_tim.c | 7619 ++++++++++++
.../Src/stm32f1xx_hal_tim_ex.c | 2379 ++++
.../Src/stm32f1xx_hal_uart.c | 3756 ++++++
README.md | 92 +
STM32F103C8TX_FLASH.ld | 185 +
.../api/v1/query/client-vscode/query.json | 1 +
.../reply/cache-v2-b4f51eaa30556c733f21.json | 1251 ++
.../cmakeFiles-v1-3b6a41022b7e436d323f.json | 146 +
.../codemodel-v2-082da6e238f3974b4443.json | 59 +
.../reply/index-2023-05-13T15-21-31-0798.json | 132 +
...-pjs_spoon-Debug-6ac936d0b62e2ad43dbe.json | 486 +
.../toolchains-v1-265fff24f3ea97b90104.json | 91 +
build/debug/build/.ninja_deps | Bin 0 -> 38104 bytes
build/debug/build/.ninja_log | 51 +
build/debug/build/CMakeCache.txt | 394 +
.../CMakeFiles/3.20.0/CMakeASMCompiler.cmake | 20 +
.../CMakeFiles/3.20.0/CMakeCCompiler.cmake | 78 +
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.../build/CMakeFiles/3.20.0/CMakeSystem.cmake | 15 +
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.../CompilerIdCXX/CMakeCXXCompilerId.cpp | 734 ++
.../3.20.0/CompilerIdCXX/CMakeCXXCompilerId.o | Bin 0 -> 2236 bytes
.../build/CMakeFiles/3.25.1/CMakeSystem.cmake | 15 +
build/debug/build/CMakeFiles/CMakeError.log | 24 +
build/debug/build/CMakeFiles/CMakeOutput.log | 296 +
.../build/CMakeFiles/TargetDirectories.txt | 3 +
.../debug/build/CMakeFiles/cmake.check_cache | 1 +
.../pjs_spoon.dir/Core/Src/gpio.c.obj | Bin 0 -> 742164 bytes
.../pjs_spoon.dir/Core/Src/i2c.c.obj | Bin 0 -> 783292 bytes
.../pjs_spoon.dir/Core/Src/main.c.obj | Bin 0 -> 743404 bytes
.../pjs_spoon.dir/Core/Src/mpu6050.cpp.obj | Bin 0 -> 830460 bytes
.../pjs_spoon.dir/Core/Src/start.cpp.obj | Bin 0 -> 892132 bytes
.../Core/Src/stm32f1xx_hal_msp.c.obj | Bin 0 -> 741396 bytes
.../pjs_spoon.dir/Core/Src/stm32f1xx_it.c.obj | Bin 0 -> 743020 bytes
.../pjs_spoon.dir/Core/Src/syscalls.c.obj | Bin 0 -> 76736 bytes
.../pjs_spoon.dir/Core/Src/sysmem.c.obj | Bin 0 -> 46424 bytes
.../Core/Src/system_stm32f1xx.c.obj | Bin 0 -> 742140 bytes
.../pjs_spoon.dir/Core/Src/tim.c.obj | Bin 0 -> 748596 bytes
.../pjs_spoon.dir/Core/Src/usart.c.obj | Bin 0 -> 747016 bytes
.../Core/Startup/startup_stm32f103c8tx.s.obj | Bin 0 -> 5240 bytes
.../Src/stm32f1xx_hal.c.obj | Bin 0 -> 753768 bytes
.../Src/stm32f1xx_hal_cortex.c.obj | Bin 0 -> 756996 bytes
.../Src/stm32f1xx_hal_dma.c.obj | Bin 0 -> 752168 bytes
.../Src/stm32f1xx_hal_exti.c.obj | Bin 0 -> 746644 bytes
.../Src/stm32f1xx_hal_flash.c.obj | Bin 0 -> 749724 bytes
.../Src/stm32f1xx_hal_flash_ex.c.obj | Bin 0 -> 752808 bytes
.../Src/stm32f1xx_hal_gpio.c.obj | Bin 0 -> 748068 bytes
.../Src/stm32f1xx_hal_gpio_ex.c.obj | Bin 0 -> 741392 bytes
.../Src/stm32f1xx_hal_i2c.c.obj | Bin 0 -> 832084 bytes
.../Src/stm32f1xx_hal_pwr.c.obj | Bin 0 -> 750128 bytes
.../Src/stm32f1xx_hal_rcc.c.obj | Bin 0 -> 754472 bytes
.../Src/stm32f1xx_hal_rcc_ex.c.obj | Bin 0 -> 744580 bytes
.../Src/stm32f1xx_hal_tim.c.obj | Bin 0 -> 833312 bytes
.../Src/stm32f1xx_hal_tim_ex.c.obj | Bin 0 -> 777772 bytes
.../Src/stm32f1xx_hal_uart.c.obj | Bin 0 -> 797428 bytes
build/debug/build/CMakeFiles/rules.ninja | 84 +
build/debug/build/build.ninja | 341 +
build/debug/build/cmake_install.cmake | 49 +
build/debug/build/pjs_spoon.bin | Bin 0 -> 18424 bytes
build/debug/build/pjs_spoon.elf | Bin 0 -> 1228332 bytes
build/debug/build/pjs_spoon.hex | 1157 ++
cmake/gcc-arm-none-eabi.cmake | 51 +
cmake/st-project.cmake | 128 +
pjs_spoon Debug.launch | 79 +
pjs_spoon.ioc | 131 +
vcpkg-configuration.json | 13 +
262 files changed, 120141 insertions(+)
create mode 100644 .cproject
create mode 100644 .mxproject
create mode 100644 .project
create mode 100644 .settings/language.settings.xml
create mode 100644 .settings/stm32cubeide.project.prefs
create mode 100644 .vs/launch.vs.json
create mode 100644 .vscode/extensions.json
create mode 100644 .vscode/launch.json
create mode 100644 .vscode/settings.json
create mode 100644 .vscode/tasks.json
create mode 100644 CMakeLists.txt
create mode 100644 CMakePresets.json
create mode 100644 Core/Inc/gpio.h
create mode 100644 Core/Inc/i2c.h
create mode 100644 Core/Inc/main.h
create mode 100644 Core/Inc/mpu6050.h
create mode 100644 Core/Inc/start.h
create mode 100644 Core/Inc/stm32f1xx_hal_conf.h
create mode 100644 Core/Inc/stm32f1xx_it.h
create mode 100644 Core/Inc/tim.h
create mode 100644 Core/Inc/usart.h
create mode 100644 Core/Src/gpio.c
create mode 100644 Core/Src/i2c.cpp
create mode 100644 Core/Src/main.c
create mode 100644 Core/Src/mpu6050.cpp
create mode 100644 Core/Src/start.cpp
create mode 100644 Core/Src/stm32f1xx_hal_msp.c
create mode 100644 Core/Src/stm32f1xx_it.c
create mode 100644 Core/Src/syscalls.c
create mode 100644 Core/Src/sysmem.c
create mode 100644 Core/Src/system_stm32f1xx.c
create mode 100644 Core/Src/tim.c
create mode 100644 Core/Src/usart.c
create mode 100644 Core/Startup/startup_stm32f103c8tx.s
create mode 100644 Debug/Core/Src/gpio.d
create mode 100644 Debug/Core/Src/gpio.o
create mode 100644 Debug/Core/Src/gpio.su
create mode 100644 Debug/Core/Src/i2c.d
create mode 100644 Debug/Core/Src/i2c.o
create mode 100644 Debug/Core/Src/i2c.su
create mode 100644 Debug/Core/Src/main.d
create mode 100644 Debug/Core/Src/main.o
create mode 100644 Debug/Core/Src/main.su
create mode 100644 Debug/Core/Src/mpu6050.d
create mode 100644 Debug/Core/Src/mpu6050.o
create mode 100644 Debug/Core/Src/mpu6050.su
create mode 100644 Debug/Core/Src/start.d
create mode 100644 Debug/Core/Src/start.o
create mode 100644 Debug/Core/Src/start.su
create mode 100644 Debug/Core/Src/stm32f1xx_hal_msp.d
create mode 100644 Debug/Core/Src/stm32f1xx_hal_msp.o
create mode 100644 Debug/Core/Src/stm32f1xx_hal_msp.su
create mode 100644 Debug/Core/Src/stm32f1xx_it.d
create mode 100644 Debug/Core/Src/stm32f1xx_it.o
create mode 100644 Debug/Core/Src/stm32f1xx_it.su
create mode 100644 Debug/Core/Src/subdir.mk
create mode 100644 Debug/Core/Src/syscalls.d
create mode 100644 Debug/Core/Src/syscalls.o
create mode 100644 Debug/Core/Src/syscalls.su
create mode 100644 Debug/Core/Src/sysmem.d
create mode 100644 Debug/Core/Src/sysmem.o
create mode 100644 Debug/Core/Src/sysmem.su
create mode 100644 Debug/Core/Src/system_stm32f1xx.d
create mode 100644 Debug/Core/Src/system_stm32f1xx.o
create mode 100644 Debug/Core/Src/system_stm32f1xx.su
create mode 100644 Debug/Core/Src/tim.d
create mode 100644 Debug/Core/Src/tim.o
create mode 100644 Debug/Core/Src/tim.su
create mode 100644 Debug/Core/Src/usart.d
create mode 100644 Debug/Core/Src/usart.o
create mode 100644 Debug/Core/Src/usart.su
create mode 100644 Debug/Core/Startup/startup_stm32f103c8tx.d
create mode 100644 Debug/Core/Startup/startup_stm32f103c8tx.o
create mode 100644 Debug/Core/Startup/subdir.mk
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su
create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d
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new file mode 100644
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\ No newline at end of file
diff --git a/.mxproject b/.mxproject
new file mode 100644
index 0000000..a521a33
--- /dev/null
+++ b/.mxproject
@@ -0,0 +1,31 @@
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+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\tim.c;Core\Src\usart.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;;
+HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;Core\Inc;
+CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=6
+HeaderFiles#0=..\Core\Inc\gpio.h
+HeaderFiles#1=..\Core\Inc\tim.h
+HeaderFiles#2=..\Core\Inc\usart.h
+HeaderFiles#3=..\Core\Inc\stm32f1xx_it.h
+HeaderFiles#4=..\Core\Inc\stm32f1xx_hal_conf.h
+HeaderFiles#5=..\Core\Inc\main.h
+HeaderFolderListSize=1
+HeaderPath#0=..\Core\Inc
+HeaderFiles=;
+SourceFileListSize=6
+SourceFiles#0=..\Core\Src\gpio.c
+SourceFiles#1=..\Core\Src\tim.c
+SourceFiles#2=..\Core\Src\usart.c
+SourceFiles#3=..\Core\Src\stm32f1xx_it.c
+SourceFiles#4=..\Core\Src\stm32f1xx_hal_msp.c
+SourceFiles#5=..\Core\Src\main.c
+SourceFolderListSize=1
+SourcePath#0=..\Core\Src
+SourceFiles=;
+
diff --git a/.project b/.project
new file mode 100644
index 0000000..a43add5
--- /dev/null
+++ b/.project
@@ -0,0 +1,33 @@
+
+
+ pjs_spoon
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.core.ccnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml
new file mode 100644
index 0000000..0d9625e
--- /dev/null
+++ b/.settings/language.settings.xml
@@ -0,0 +1,25 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/.settings/stm32cubeide.project.prefs b/.settings/stm32cubeide.project.prefs
new file mode 100644
index 0000000..f0b943d
--- /dev/null
+++ b/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,4 @@
+66BE74F758C12D739921AEA421D593D3=0
+8DF89ED150041C4CBC7CB9A9CAA90856=BD81A38ABCB6A8D22A0F87C5AFB577AD
+DC22A860405A8BF2F2C095E5B6529F12=BD81A38ABCB6A8D22A0F87C5AFB577AD
+eclipse.preferences.version=1
diff --git a/.vs/launch.vs.json b/.vs/launch.vs.json
new file mode 100644
index 0000000..fde6015
--- /dev/null
+++ b/.vs/launch.vs.json
@@ -0,0 +1,26 @@
+{
+ "version": "0.2.1",
+ "configurations": [
+ {
+ "project": "CMakeLists.txt",
+ "projectTarget": "pjs_spoon.elf",
+ "name": "Launch",
+ "type": "cppdbg",
+ "request": "launch",
+ "cwd": "${workspaceRoot}",
+ "program": "${debugInfo.fullTargetPath}",
+ "MIMode": "gdb",
+ "miDebuggerPath": "${st.gdb}",
+ "miDebuggerServerAddress": "localhost:3333",
+ "debugServerPath": "${st.gdbserver}",
+ "debugServerArgs": "--stm32cubeprogrammer-path ${st.cubeprogrammer} --swd --port-number 3333",
+ "serverStarted": "Waiting for connection on port .*\\.\\.\\.",
+ "stopAtConnect": true,
+ "postRemoteConnectCommands": [
+ {
+ "text": "load build/debug/build/pjs_spoon.elf"
+ }
+ ],
+ "svdPath": "${st.svd}/STM32F103.svd" }
+ ]
+}
\ No newline at end of file
diff --git a/.vscode/extensions.json b/.vscode/extensions.json
new file mode 100644
index 0000000..9600176
--- /dev/null
+++ b/.vscode/extensions.json
@@ -0,0 +1,7 @@
+{
+ "recommendations": [
+ "ms-vscode.cmake-tools",
+ "ms-vscode.cpptools",
+ "ms-vscode.vscode-embedded-tools"
+ ]
+}
diff --git a/.vscode/launch.json b/.vscode/launch.json
new file mode 100644
index 0000000..9b9e2e9
--- /dev/null
+++ b/.vscode/launch.json
@@ -0,0 +1,29 @@
+{
+ "version": "0.2.0",
+ "configurations": [
+ {
+ "name": "Launch",
+ "type": "cppdbg",
+ "request": "launch",
+ "cwd": "${workspaceFolder}",
+ "program": "${command:cmake.launchTargetPath}",
+ "MIMode": "gdb",
+ "miDebuggerPath": "${command:vscode-embedded.st.gdb}",
+ "miDebuggerServerAddress": "localhost:3333",
+ "debugServerPath": "${command:vscode-embedded.st.gdbserver}",
+ "debugServerArgs": "--stm32cubeprogrammer-path ${command:vscode-embedded.st.cubeprogrammer} --swd --port-number 3333",
+ "serverStarted": "Waiting for connection on port .*\\.\\.\\.",
+ "stopAtConnect": true,
+ "postRemoteConnectCommands": [
+ {
+ "text": "load build/debug/build/pjs_spoon.elf"
+ }
+ ],
+ "logging": {
+ "engineLogging": true
+ },
+ "preLaunchTask": "Build",
+ "svdPath": "${command:vscode-embedded.st.svd}/STM32F103.svd"
+ }
+ ]
+}
diff --git a/.vscode/settings.json b/.vscode/settings.json
new file mode 100644
index 0000000..3bd93c0
--- /dev/null
+++ b/.vscode/settings.json
@@ -0,0 +1,29 @@
+{
+ "C_Cpp.default.configurationProvider": "ms-vscode.cmake-tools",
+ "cmake.configureOnOpen": true,
+ "MicroPython.executeButton": [
+ {
+ "text": "▶",
+ "tooltip": "运行",
+ "alignment": "left",
+ "command": "extension.executeFile",
+ "priority": 3.5
+ }
+ ],
+ "MicroPython.syncButton": [
+ {
+ "text": "$(sync)",
+ "tooltip": "同步",
+ "alignment": "left",
+ "command": "extension.execute",
+ "priority": 4
+ }
+ ],
+ "C_Cpp.errorSquiggles": "disabled",
+ "files.associations": {
+ "*.vue": "vue",
+ "*.md": "markdown",
+ "string": "cpp",
+ "iostream": "cpp"
+ }
+}
diff --git a/.vscode/tasks.json b/.vscode/tasks.json
new file mode 100644
index 0000000..b278eb8
--- /dev/null
+++ b/.vscode/tasks.json
@@ -0,0 +1,15 @@
+{
+ "version": "2.0.0",
+ "tasks": [
+ {
+ "label": "Build",
+ "type": "cmake",
+ "command": "build",
+ "problemMatcher": "$gcc",
+ "group": {
+ "kind": "build",
+ "isDefault": true
+ }
+ }
+ ]
+}
diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 0000000..964c4c4
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,8 @@
+cmake_minimum_required(VERSION 3.20)
+
+project("pjs_spoon" C CXX ASM)
+
+include(cmake/st-project.cmake)
+
+add_executable(${PROJECT_NAME})
+add_st_target_properties(${PROJECT_NAME})
\ No newline at end of file
diff --git a/CMakePresets.json b/CMakePresets.json
new file mode 100644
index 0000000..ff2fa53
--- /dev/null
+++ b/CMakePresets.json
@@ -0,0 +1,53 @@
+{
+ "version": 2,
+ "configurePresets": [
+ {
+ "name": "default",
+ "hidden": true,
+ "generator": "Ninja",
+ "binaryDir": "${sourceDir}/build/${presetName}/build",
+ "cacheVariables": {
+ "CMAKE_INSTALL_PREFIX": "${sourceDir}/build/${presetName}/install",
+ "CMAKE_TOOLCHAIN_FILE": {
+ "type": "FILEPATH",
+ "value": "${sourceDir}/cmake/gcc-arm-none-eabi.cmake"
+ }
+ },
+ "architecture": {
+ "value": "unspecified",
+ "strategy": "external"
+ },
+ "vendor": {
+ "microsoft.com/VisualStudioSettings/CMake/1.0": {
+ "intelliSenseMode": "linux-gcc-arm"
+ }
+ }
+ },
+ {
+ "name": "debug",
+ "inherits": "default",
+ "cacheVariables": {
+ "CMAKE_BUILD_TYPE": "Debug",
+ "PRESET_NAME": "debug"
+ }
+ },
+ {
+ "name": "release",
+ "inherits": "default",
+ "cacheVariables": {
+ "CMAKE_BUILD_TYPE": "Release",
+ "PRESET_NAME": "release"
+ }
+ }
+ ],
+ "buildPresets": [
+ {
+ "name": "debug",
+ "configurePreset": "debug"
+ },
+ {
+ "name": "release",
+ "configurePreset": "release"
+ }
+ ]
+}
diff --git a/Core/Inc/gpio.h b/Core/Inc/gpio.h
new file mode 100644
index 0000000..21a3b5a
--- /dev/null
+++ b/Core/Inc/gpio.h
@@ -0,0 +1,49 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file gpio.h
+ * @brief This file contains all the function prototypes for
+ * the gpio.c file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_GPIO_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ GPIO_H__ */
+
diff --git a/Core/Inc/i2c.h b/Core/Inc/i2c.h
new file mode 100644
index 0000000..ee5a873
--- /dev/null
+++ b/Core/Inc/i2c.h
@@ -0,0 +1,42 @@
+/**
+ * @file i2c
+ * @brief zzy
+ *
+ * @version 0.1
+ * @date 2023-05-13
+ *
+ * @copyright Copyright (c) 2023
+ *
+ */
+#ifndef __I2C_H_
+#define __I2C_H_
+
+#include "main.h"
+#include
+
+
+class IIC
+{
+private:
+ GPIO_TypeDef *SCL_GPIO_PORT;
+ uint16_t SCL_PIN;
+ GPIO_TypeDef *SDA_GPIO_PORT;
+ uint16_t SDA_PIN;
+public:
+ IIC(GPIO_TypeDef *scl_gpio_port, uint16_t scl_pin, GPIO_TypeDef *sda_gpio_port, uint16_t sda_pin);
+ void WriteSDA(GPIO_PinState PinState);
+ void WriteSCL(GPIO_PinState PinState);
+ GPIO_PinState ReadSDA();
+ GPIO_PinState ReadSCL();
+ void Delay();
+ void Start();
+ void End();
+ void Send_ACK(uint8_t ack);
+ uint8_t Get_ACK();
+ uint8_t SendByte(uint8_t dat);
+ uint8_t ReadByte(uint8_t ack);
+ uint8_t WriteLen(uint8_t addr, uint8_t reg, uint8_t len, uint8_t *buf);
+ uint8_t ReadLen(uint8_t addr, uint8_t reg, uint8_t len, uint8_t *buf);
+};
+
+#endif
\ No newline at end of file
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
new file mode 100644
index 0000000..c4579a3
--- /dev/null
+++ b/Core/Inc/main.h
@@ -0,0 +1,72 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define I2C_SCL_Pin GPIO_PIN_6
+#define I2C_SCL_GPIO_Port GPIOB
+#define I2C_SDA_Pin GPIO_PIN_7
+#define I2C_SDA_GPIO_Port GPIOB
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Core/Inc/mpu6050.h b/Core/Inc/mpu6050.h
new file mode 100644
index 0000000..c18ce51
--- /dev/null
+++ b/Core/Inc/mpu6050.h
@@ -0,0 +1,92 @@
+/**
+ * @file mpu6050.h
+ * @author zzy
+ * @brief mpu6050驱动头文件
+ * @version 0.1
+ * @date 2023-05-11
+ *
+ * @copyright Copyright (c) 2023
+ *
+ */
+#ifndef _MPU6050_H
+#define _MPU6050_H
+
+#include "main.h"
+#include
+#include
+#include "i2c.h"
+
+#define RAD_TO_DEG 57.3
+
+#define WHO_AM_I_REG 0x75
+#define PWR_MGMT_1_REG 0x6B
+#define SMPLRT_DIV_REG 0x19
+#define ACCEL_CONFIG_REG 0x1C
+#define ACCEL_XOUT_H_REG 0x3B
+#define TEMP_OUT_H_REG 0x41
+#define GYRO_CONFIG_REG 0x1B
+#define GYRO_XOUT_H_REG 0x43
+
+IIC iic(GPIOB, GPIO_PIN_6, GPIOB, GPIO_PIN_7);
+
+/**
+ * @brief MPU6050数据类型结构体
+ *
+ */
+typedef struct
+{
+
+ int16_t Accel_X_RAW;
+ int16_t Accel_Y_RAW;
+ int16_t Accel_Z_RAW;
+ double Ax;
+ double Ay;
+ double Az;
+
+ int16_t Gyro_X_RAW;
+ int16_t Gyro_Y_RAW;
+ int16_t Gyro_Z_RAW;
+ double Gx;
+ double Gy;
+ double Gz;
+
+ float Temperature;
+
+ double KalmanAngleX;
+ double KalmanAngleY;
+} MPU6050_t;
+
+/**
+ * @brief Kalman滤波所用数据结构体
+ *
+ */
+typedef struct
+{
+ double Q_angle;
+ double Q_bias;
+ double R_measure;
+ double angle;
+ double bias;
+ double P[2][2];
+} Kalman_t;
+
+/**
+ * @brief 驱动MPU6050的类
+ *
+ */
+class MPU6050
+{
+private:
+ uint16_t __addr__;
+ uint8_t WriteByte(uint8_t reg, uint8_t data);
+ uint8_t ReadByte(uint8_t reg);
+public:
+ MPU6050(uint16_t addr);
+ uint8_t init();
+ void Read_Accel(MPU6050_t *DataStruct);
+ void Read_Gyro(MPU6050_t *DataStruct);
+ void Read_Temp(MPU6050_t *DataStruct);
+ void Read_All(MPU6050_t *DataStruct);
+ double Kalman_getAngle(Kalman_t *Kalman, double newAngle, double newRate, double dt);
+};
+#endif
\ No newline at end of file
diff --git a/Core/Inc/start.h b/Core/Inc/start.h
new file mode 100644
index 0000000..41e36c6
--- /dev/null
+++ b/Core/Inc/start.h
@@ -0,0 +1,14 @@
+#ifndef __START_H_
+#define __START_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+ void setup(void);
+ void loop(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/Core/Inc/stm32f1xx_hal_conf.h b/Core/Inc/stm32f1xx_hal_conf.h
new file mode 100644
index 0000000..f8ba603
--- /dev/null
+++ b/Core/Inc/stm32f1xx_hal_conf.h
@@ -0,0 +1,391 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32f1xx_hal_conf.h
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_CONF_H
+#define __STM32F1xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_CAN_MODULE_ENABLED */
+/*#define HAL_CAN_LEGACY_MODULE_ENABLED */
+/*#define HAL_CEC_MODULE_ENABLED */
+/*#define HAL_CORTEX_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_DMA_MODULE_ENABLED */
+/*#define HAL_ETH_MODULE_ENABLED */
+/*#define HAL_FLASH_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+/*#define HAL_I2C_MODULE_ENABLED */
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_PCCARD_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_HCD_MODULE_ENABLED */
+/*#define HAL_PWR_MODULE_ENABLED */
+/*#define HAL_RCC_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SD_MODULE_ENABLED */
+/*#define HAL_MMC_MODULE_ENABLED */
+/*#define HAL_SDRAM_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SPI_MODULE_ENABLED */
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature. */
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+#define VDD_VALUE 3300U /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 1U
+
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
+#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
+#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
+#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
+#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
+#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
+#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
+#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0 2U
+#define MAC_ADDR1 0U
+#define MAC_ADDR2 0U
+#define MAC_ADDR3 0U
+#define MAC_ADDR4 0U
+#define MAC_ADDR5 0U
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
+#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
+#define ETH_RXBUFNB 8U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
+#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848_PHY_ADDRESS Address*/
+#define DP83848_PHY_ADDRESS 0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY 0x00000FFFU
+
+#define PHY_READ_TO 0x0000FFFFU
+#define PHY_WRITE_TO 0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
+#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
+
+#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
+#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
+#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
+#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
+#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
+#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
+#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
+
+#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
+#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
+#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
+
+/* Section 4: Extended PHY Registers */
+#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
+
+#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
+#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32f1xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32f1xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32f1xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32f1xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+#include "stm32f1xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+#include "stm32f1xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+ #include "Legacy/stm32f1xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+#include "stm32f1xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32f1xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32f1xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32f1xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32f1xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32f1xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32f1xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32f1xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32f1xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32f1xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32f1xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32f1xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32f1xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+#include "stm32f1xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+#include "stm32f1xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32f1xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32f1xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32f1xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32f1xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32f1xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32f1xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32f1xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32f1xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32f1xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+#include "stm32f1xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32f1xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t* file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_HAL_CONF_H */
+
diff --git a/Core/Inc/stm32f1xx_it.h b/Core/Inc/stm32f1xx_it.h
new file mode 100644
index 0000000..1065deb
--- /dev/null
+++ b/Core/Inc/stm32f1xx_it.h
@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32f1xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_IT_H
+#define __STM32F1xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_IT_H */
diff --git a/Core/Inc/tim.h b/Core/Inc/tim.h
new file mode 100644
index 0000000..dca03af
--- /dev/null
+++ b/Core/Inc/tim.h
@@ -0,0 +1,54 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file tim.h
+ * @brief This file contains all the function prototypes for
+ * the tim.c file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TIM_H__
+#define __TIM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern TIM_HandleTypeDef htim2;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_TIM2_Init(void);
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TIM_H__ */
+
diff --git a/Core/Inc/usart.h b/Core/Inc/usart.h
new file mode 100644
index 0000000..f9008d9
--- /dev/null
+++ b/Core/Inc/usart.h
@@ -0,0 +1,52 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file usart.h
+ * @brief This file contains all the function prototypes for
+ * the usart.c file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USART_H__
+#define __USART_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern UART_HandleTypeDef huart1;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_USART1_UART_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USART_H__ */
+
diff --git a/Core/Src/gpio.c b/Core/Src/gpio.c
new file mode 100644
index 0000000..195d573
--- /dev/null
+++ b/Core/Src/gpio.c
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file gpio.c
+ * @brief This file provides code for the configuration
+ * of all used GPIO pins.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "gpio.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure GPIO */
+/*----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/** Configure pins as
+ * Analog
+ * Input
+ * Output
+ * EVENT_OUT
+ * EXTI
+*/
+void MX_GPIO_Init(void)
+{
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, I2C_SCL_Pin|I2C_SDA_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pins : PBPin PBPin */
+ GPIO_InitStruct.Pin = I2C_SCL_Pin|I2C_SDA_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */
diff --git a/Core/Src/i2c.cpp b/Core/Src/i2c.cpp
new file mode 100644
index 0000000..17cf86f
--- /dev/null
+++ b/Core/Src/i2c.cpp
@@ -0,0 +1,249 @@
+/**
+ * @file i2c.cpp
+ * @author zzy
+ * @brief
+ * @version 0.1
+ * @date 2023-05-13
+ *
+ * @copyright Copyright (c) 2023
+ *
+ */
+
+#include "i2c.h"
+
+/**
+ * @brief IIC类的构造函数
+ *
+ * @param scl_gpio_port SCL的GPIO组号
+ * @param scl_pin SCL的GPIO端口号
+ * @param sda_gpio_port SDA的GPIO组号
+ * @param sda_pin SDA的GPIO端口号
+ */
+IIC::IIC(GPIO_TypeDef *scl_gpio_port, uint16_t scl_pin, GPIO_TypeDef *sda_gpio_port, uint16_t sda_pin)
+{
+ this->SCL_GPIO_PORT = scl_gpio_port;
+ this->SCL_PIN = scl_pin;
+ this->SDA_GPIO_PORT = sda_gpio_port;
+ this->SDA_PIN = sda_pin;
+}
+
+/**
+ * @brief 向SDA中写入0或1
+ *
+ * @param PinState
+ */
+void IIC::WriteSDA(GPIO_PinState PinState)
+{
+ HAL_GPIO_WritePin(this->SDA_GPIO_PORT, this->SDA_PIN, PinState);
+}
+
+/**
+ * @brief 向SCL中写入0或1
+ *
+ * @param PinState
+ */
+void IIC::WriteSCL(GPIO_PinState PinState)
+{
+ HAL_GPIO_WritePin(this->SCL_GPIO_PORT, this->SCL_PIN, PinState);
+}
+
+/**
+ * @brief 读取SDA的值
+ *
+ * @return GPIO_PinState
+ */
+GPIO_PinState IIC::ReadSDA()
+{
+ HAL_GPIO_ReadPin(this->SDA_GPIO_PORT, this->SDA_PIN);
+}
+
+/**
+ * @brief 读取SCL的值
+ *
+ * @return GPIO_PinState
+ */
+GPIO_PinState IIC::ReadSCL()
+{
+ HAL_GPIO_ReadPin(this->SCL_GPIO_PORT, this->SCL_PIN);
+}
+
+/**
+ * @brief IIC专用延时函数
+ *
+ */
+void IIC::Delay()
+{
+ int z = 0xff;
+ while (z--)
+ ;
+}
+
+/**
+ * @brief 产生I2C起始信号
+ *
+ */
+void IIC::Start()
+{
+ this->WriteSDA(GPIO_PIN_SET); // 需在SCL之前设定
+ this->WriteSCL(GPIO_PIN_SET); // SCL->高
+ this->Delay(); // 延时
+ this->WriteSDA(GPIO_PIN_RESET); // SDA由1->0,产生开始信号
+ this->Delay(); // 延时
+ this->WriteSCL(GPIO_PIN_RESET); // SCL->低
+}
+
+/**
+ * @brief 产生I2C结束信号
+ *
+ */
+void IIC::End()
+{
+ this->WriteSDA(GPIO_PIN_RESET); // 在SCL之前拉低
+ this->WriteSCL(GPIO_PIN_SET); // SCL->高
+ this->Delay(); // 延时
+ this->WriteSDA(GPIO_PIN_SET); // SDA由0->1,产生结束信号
+ this->Delay();
+}
+
+/**
+ * @brief 发送应答码
+ *
+ * @param ack 0应答 1不应答
+ */
+void IIC::Send_ACK(uint8_t ack)
+{
+ if (ack == 1)
+ this->WriteSDA(GPIO_PIN_SET); // 产生应答电平
+ else
+ this->WriteSDA(GPIO_PIN_RESET);
+ this->Delay();
+ this->WriteSCL(GPIO_PIN_SET); // 发送应答信号
+ this->Delay(); // 延时至少4us
+ this->WriteSCL(GPIO_PIN_RESET); // 整个期间保持应答信号
+}
+
+/**
+ * @brief 接收应答码
+ *
+ * @return uint8_t 应答码 0 应答 1 不应达
+ */
+uint8_t IIC::Get_ACK()
+{
+ uint8_t ret; // 用来接收返回值
+ this->WriteSDA(GPIO_PIN_SET); // 电阻上拉,进入读
+ this->Delay();
+ this->WriteSCL(GPIO_PIN_SET); // 进入应答检测
+ this->Delay(); // 至少延时4us
+ ret = this->ReadSDA(); // 保存应答信号
+ this->WriteSCL(GPIO_PIN_RESET);
+ return ret;
+}
+
+/**
+ * @brief I2C写1Byte
+ *
+ * @param dat 1Byte数据
+ * @return uint8_t 应答结果 0应答 1不应答
+ */
+uint8_t IIC::SendByte(uint8_t dat)
+{
+ uint8_t ack;
+ for (int i = 0; i < 8; i++)
+ {
+ // 高在前低在后
+ if (dat & 0x80)
+ this->WriteSDA(GPIO_PIN_SET);
+ else
+ this->WriteSDA(GPIO_PIN_RESET);
+ this->Delay();
+ this->WriteSCL(GPIO_PIN_SET);
+ this->Delay(); // 延时至少4us
+ this->WriteSCL(GPIO_PIN_RESET);
+ dat <<= 1; // 低位向高位移动
+ }
+
+ ack = this->Get_ACK();
+
+ return ack;
+}
+
+/**
+ * @brief IIC读取1Byte数据
+ *
+ * @param ack 0应答 1不应答
+ * @return uint8_t 读取到的数据
+ */
+uint8_t IIC::ReadByte(uint8_t ack)
+{
+ uint8_t ret = 0;
+ this->WriteSDA(GPIO_PIN_SET);
+ for (int i = 0; i < 8; i++)
+ {
+ ret <<= 1;
+ this->WriteSCL(GPIO_PIN_SET);
+ this->Delay();
+ // 高在前低在后
+ if (this->ReadSDA())
+ {
+ ret++;
+ }
+ this->WriteSCL(GPIO_PIN_RESET);
+ this->Delay();
+ }
+
+ this->Send_ACK(ack);
+
+ return ret;
+}
+
+/**
+ * @brief I2C连续写
+ *
+ * @param addr 器件地址
+ * @param reg 寄存器地址
+ * @param len 长度
+ * @param buf 缓冲区地址
+ * @return uint8_t 状态 0成功 其他失败
+ */
+uint8_t IIC::WriteLen(uint8_t addr, uint8_t reg, uint8_t len, uint8_t *buf)
+{
+ uint8_t i;
+ this->Start();
+ this->SendByte((addr << 1) | 0); // 发送器件地址+写命令
+ this->SendByte(reg); // 写寄存器地址
+ for (i = 0; i < len; i++)
+ {
+ this->SendByte(buf[i]); // 发送数据
+ }
+ this->End();
+ return 0;
+}
+
+/**
+ * @brief I2C连续读
+ *
+ * @param addr 器件地址
+ * @param reg 寄存器地址
+ * @param len 长度
+ * @param buf 缓冲区地址
+ * @return uint8_t 状态 0成功 其他失败
+ */
+uint8_t IIC::ReadLen(uint8_t addr, uint8_t reg, uint8_t len, uint8_t *buf)
+{
+ this->Start();
+ this->SendByte((addr << 1) | 0); // 发送器件地址+写命令
+ this->SendByte(reg); // 写寄存器地址
+ this->Start();
+ this->SendByte((addr << 1) | 1); // 发送器件地址+读命令
+ while (len)
+ {
+ if (len == 1)
+ *buf = this->ReadByte(1); // 读数据,发送nACK
+ else
+ *buf = this->ReadByte(0); // 读数据,发送ACK
+ len--;
+ buf++;
+ }
+ this->End(); // 产生一个停止条件
+ return 0;
+}
\ No newline at end of file
diff --git a/Core/Src/main.c b/Core/Src/main.c
new file mode 100644
index 0000000..1d1f4c8
--- /dev/null
+++ b/Core/Src/main.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "tim.h"
+#include "usart.h"
+#include "gpio.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "start.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_TIM2_Init();
+ MX_USART1_UART_Init();
+ /* USER CODE BEGIN 2 */
+ setup();
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ loop();
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Core/Src/mpu6050.cpp b/Core/Src/mpu6050.cpp
new file mode 100644
index 0000000..9a3258f
--- /dev/null
+++ b/Core/Src/mpu6050.cpp
@@ -0,0 +1,274 @@
+/**
+ * @file mpu6050.cpp
+ * @author zzy
+ * @brief
+ * @version 0.1
+ * @date 2023-05-12
+ *
+ * @copyright Copyright (c) 2023
+ *
+ */
+#include "mpu6050.h"
+#include "usart.h"
+#include
+
+uint32_t timer;
+
+Kalman_t KalmanX = {
+ .Q_angle = 0.001f,
+ .Q_bias = 0.003f,
+ .R_measure = 0.03f};
+
+Kalman_t KalmanY = {
+ .Q_angle = 0.001f,
+ .Q_bias = 0.003f,
+ .R_measure = 0.03f};
+
+/**
+ * @brief MPU6050构造函数
+ *
+ * @param addr 器件地址
+ */
+MPU6050::MPU6050(uint16_t addr)
+{
+ this->__addr__ = addr;
+}
+
+/**
+ * @brief MUP6050 I2C写一个字节
+ *
+ * @param reg 寄存器地址
+ * @param data 数据
+ * @return uint8_t 0成功 其他失败
+ */
+uint8_t MPU6050::WriteByte(uint8_t reg, uint8_t data)
+{
+ iic.Start();
+ iic.SendByte((this->__addr__ << 1) | 0); // 发送器件地址+写命令
+ iic.SendByte(reg); // 写寄存器地址
+ iic.SendByte(data); // 发送数据
+ iic.End();
+ return 0;
+}
+
+/**
+ * @brief MUP6050 I2C读一个字节
+ *
+ * @param reg 寄存器地址
+ * @return uint8_t 读取到的数据
+ */
+uint8_t MPU6050::ReadByte(uint8_t reg)
+{
+ uint8_t res;
+ iic.Start();
+ iic.SendByte((this->__addr__ << 1) | 0); // 发送器件地址+写命令
+ iic.SendByte(reg); // 写寄存器地址
+ iic.Start();
+ iic.SendByte((this->__addr__ << 1) | 1); // 发送器件地址+读命令
+ res = iic.ReadByte(1); // 读取数据,发送nACK
+ iic.End(); // 产生一个停止条件
+ return res;
+}
+
+/**
+ * @brief MPU6050的初始化
+ *
+ * @return uint8_t 若初始化成功则返回1，否则返回0
+ */
+uint8_t MPU6050::init()
+{
+ uint8_t res;
+
+ this->WriteByte(MPU_PWR_MGMT1_REG, 0X80); // 复位MPU6050
+ HAL_Delay(100);
+ MPU_Write_Byte(MPU_PWR_MGMT1_REG, 0X00); // 唤醒MPU6050
+ MPU_Set_Gyro_Fsr(3); // 陀螺仪传感器,±2000dps
+ MPU_Set_Accel_Fsr(0); // 加速度传感器,±2g
+ MPU_Set_Rate(50); // 设置采样率50Hz
+ MPU_Write_Byte(MPU_INT_EN_REG, 0X00); // 关闭所有中断
+ MPU_Write_Byte(MPU_USER_CTRL_REG, 0X00); // I2C主模式关闭
+ MPU_Write_Byte(MPU_FIFO_EN_REG, 0X00); // 关闭FIFO
+ MPU_Write_Byte(MPU_INTBP_CFG_REG, 0X80); // INT引脚低电平有效
+ res = MPU_Read_Byte(MPU_DEVICE_ID_REG);
+ if (res == MPU_ADDR) // 器件ID正确
+ {
+ MPU_Write_Byte(MPU_PWR_MGMT1_REG, 0X01); // 设置CLKSEL,PLL X轴为参考
+ MPU_Write_Byte(MPU_PWR_MGMT2_REG, 0X00); // 加速度与陀螺仪都工作
+ MPU_Set_Rate(50); // 设置采样率为50Hz
+ }
+ else
+ return 1;
+ return 0;
+}
+
+/**
+ * @brief 读取加速度值
+ *
+ * @param DataStruct 用于存储MPU6050获取到的参数结构体
+ */
+void MPU6050::Read_Accel(MPU6050_t *DataStruct)
+{
+
+ uint8_t Rec_Data[6];
+
+ // Read 6 BYTES of data starting from ACCEL_XOUT_H register
+
+ HAL_iic.Mem_Read(this->__I2Cx__, this->__addr__, ACCEL_XOUT_H_REG, 1, Rec_Data, 6, this->__timeout__);
+
+ DataStruct->Accel_X_RAW = (int16_t)(Rec_Data[0] << 8 | Rec_Data[1]);
+ DataStruct->Accel_Y_RAW = (int16_t)(Rec_Data[2] << 8 | Rec_Data[3]);
+ DataStruct->Accel_Z_RAW = (int16_t)(Rec_Data[4] << 8 | Rec_Data[5]);
+
+ /*** convert the RAW values into acceleration in 'g'
+ we have to divide according to the Full scale value set in FS_SEL
+ I have configured FS_SEL = 0. So I am dividing by 16384.0
+ for more details check ACCEL_CONFIG Register ****/
+
+ DataStruct->Ax = DataStruct->Accel_X_RAW / 16384.0;
+ DataStruct->Ay = DataStruct->Accel_Y_RAW / 16384.0;
+ DataStruct->Az = DataStruct->Accel_Z_RAW / 14418.0;
+}
+
+/**
+ * @brief 读取角度值
+ *
+ * @param DataStruct 用于存储MPU6050获取到的参数结构体
+ */
+void MPU6050::Read_Gyro(MPU6050_t *DataStruct)
+{
+ uint8_t Rec_Data[6];
+
+ // Read 6 BYTES of data starting from GYRO_XOUT_H register
+
+ HAL_iic.Mem_Read(this->__I2Cx__, this->__addr__, GYRO_XOUT_H_REG, 1, Rec_Data, 6, this->__timeout__);
+
+ DataStruct->Gyro_X_RAW = (int16_t)(Rec_Data[0] << 8 | Rec_Data[1]);
+ DataStruct->Gyro_Y_RAW = (int16_t)(Rec_Data[2] << 8 | Rec_Data[3]);
+ DataStruct->Gyro_Z_RAW = (int16_t)(Rec_Data[4] << 8 | Rec_Data[5]);
+
+ /*** convert the RAW values into dps (�/s)
+ we have to divide according to the Full scale value set in FS_SEL
+ I have configured FS_SEL = 0. So I am dividing by 131.0
+ for more details check GYRO_CONFIG Register ****/
+
+ DataStruct->Gx = DataStruct->Gyro_X_RAW / 131.0;
+ DataStruct->Gy = DataStruct->Gyro_Y_RAW / 131.0;
+ DataStruct->Gz = DataStruct->Gyro_Z_RAW / 131.0;
+}
+
+/**
+ * @brief 读取温度值
+ *
+ * @param DataStruct 用于存储MPU6050获取到的参数结构体
+ */
+void MPU6050::Read_Temp(MPU6050_t *DataStruct)
+{
+ uint8_t Rec_Data[2];
+ int16_t temp;
+
+ // Read 2 BYTES of data starting from TEMP_OUT_H_REG register
+
+ HAL_iic.Mem_Read(this->__I2Cx__, this->__addr__, TEMP_OUT_H_REG, 1, Rec_Data, 2, this->__timeout__);
+
+ temp = (int16_t)(Rec_Data[0] << 8 | Rec_Data[1]);
+ DataStruct->Temperature = (float)((int16_t)temp / (float)340.0 + (float)36.53);
+}
+
+/**
+ * @brief 读取所有信息
+ *
+ * @param DataStruct 用于存储MPU6050获取到的参数结构体
+ */
+void MPU6050::Read_All(MPU6050_t *DataStruct)
+{
+ uint8_t Rec_Data[14];
+ int16_t temp;
+
+ // Read 14 BYTES of data starting from ACCEL_XOUT_H register
+ // Accel and gyro's x, y and z data is seriate, so just read 14 bytes for the first register
+
+ HAL_iic.Mem_Read(this->__I2Cx__, this->__addr__, ACCEL_XOUT_H_REG, 1, Rec_Data, 14, this->__timeout__);
+
+ DataStruct->Accel_X_RAW = (int16_t)(Rec_Data[0] << 8 | Rec_Data[1]);
+ DataStruct->Accel_Y_RAW = (int16_t)(Rec_Data[2] << 8 | Rec_Data[3]);
+ DataStruct->Accel_Z_RAW = (int16_t)(Rec_Data[4] << 8 | Rec_Data[5]);
+ temp = (int16_t)(Rec_Data[6] << 8 | Rec_Data[7]);
+ DataStruct->Gyro_X_RAW = (int16_t)(Rec_Data[8] << 8 | Rec_Data[9]);
+ DataStruct->Gyro_Y_RAW = (int16_t)(Rec_Data[10] << 8 | Rec_Data[11]);
+ DataStruct->Gyro_Z_RAW = (int16_t)(Rec_Data[12] << 8 | Rec_Data[13]);
+
+ DataStruct->Ax = DataStruct->Accel_X_RAW / 16384.0; // unit: g
+ DataStruct->Ay = DataStruct->Accel_Y_RAW / 16384.0;
+ DataStruct->Az = DataStruct->Accel_Z_RAW / 14418.0;
+ DataStruct->Temperature = (float)((int16_t)temp / (float)340.0 + (float)36.53);
+ DataStruct->Gx = DataStruct->Gyro_X_RAW / 131.0;
+ DataStruct->Gy = DataStruct->Gyro_Y_RAW / 131.0;
+ DataStruct->Gz = DataStruct->Gyro_Z_RAW / 131.0;
+
+ // Kalman angle solve
+ double dt = (double)(HAL_GetTick() - timer) / 1000;
+ timer = HAL_GetTick();
+ double roll;
+ double roll_sqrt = sqrt(
+ DataStruct->Accel_X_RAW * DataStruct->Accel_X_RAW + DataStruct->Accel_Z_RAW * DataStruct->Accel_Z_RAW);
+ if (roll_sqrt != 0.0)
+ {
+ roll = atan(DataStruct->Accel_Y_RAW / roll_sqrt) * RAD_TO_DEG;
+ }
+ else
+ {
+ roll = 0.0;
+ }
+ double pitch = atan2(-DataStruct->Accel_X_RAW, DataStruct->Accel_Z_RAW) * RAD_TO_DEG;
+ if ((pitch < -90 && DataStruct->KalmanAngleY > 90) || (pitch > 90 && DataStruct->KalmanAngleY < -90))
+ {
+ KalmanY.angle = pitch;
+ DataStruct->KalmanAngleY = pitch;
+ }
+ else
+ {
+ DataStruct->KalmanAngleY = Kalman_getAngle(&KalmanY, pitch, DataStruct->Gy, dt);
+ }
+ if (fabs(DataStruct->KalmanAngleY) > 90)
+ DataStruct->Gx = -DataStruct->Gx;
+ DataStruct->KalmanAngleX = Kalman_getAngle(&KalmanX, roll, DataStruct->Gx, dt);
+}
+
+/**
+ * @brief
+ *
+ * @param Kalman Kalman滤波所需数据结构体
+ * @param newAngle 角度值
+ * @param newRate
+ * @param dt 采样周期
+ * @return double 滤波后的角度值
+ */
+double MPU6050::Kalman_getAngle(Kalman_t *Kalman, double newAngle, double newRate, double dt)
+{
+ double rate = newRate - Kalman->bias;
+ Kalman->angle += dt * rate;
+
+ Kalman->P[0][0] += dt * (dt * Kalman->P[1][1] - Kalman->P[0][1] - Kalman->P[1][0] + Kalman->Q_angle);
+ Kalman->P[0][1] -= dt * Kalman->P[1][1];
+ Kalman->P[1][0] -= dt * Kalman->P[1][1];
+ Kalman->P[1][1] += Kalman->Q_bias * dt;
+
+ double S = Kalman->P[0][0] + Kalman->R_measure;
+ double K[2];
+ K[0] = Kalman->P[0][0] / S;
+ K[1] = Kalman->P[1][0] / S;
+
+ double y = newAngle - Kalman->angle;
+ Kalman->angle += K[0] * y;
+ Kalman->bias += K[1] * y;
+
+ double P00_temp = Kalman->P[0][0];
+ double P01_temp = Kalman->P[0][1];
+
+ Kalman->P[0][0] -= K[0] * P00_temp;
+ Kalman->P[0][1] -= K[0] * P01_temp;
+ Kalman->P[1][0] -= K[1] * P00_temp;
+ Kalman->P[1][1] -= K[1] * P01_temp;
+
+ return Kalman->angle;
+}
\ No newline at end of file
diff --git a/Core/Src/start.cpp b/Core/Src/start.cpp
new file mode 100644
index 0000000..ba4087b
--- /dev/null
+++ b/Core/Src/start.cpp
@@ -0,0 +1,48 @@
+#include "start.h"
+#include "main.h"
+#include "usart.h"
+#include
+
+#include
+#include
+
+#include "mpu6050.h"
+
+MPU6050 mpu(&hi2c1, 0xD0, 1000);
+
+MPU6050_t DataStruct;
+
+uint8_t success = 0;
+/**
+ * @brief 初始化函数
+ *
+ */
+void setup()
+{
+ success = mpu.init();
+ if(success)
+ {
+ printf("mpu6050 init success!\r\n");
+ }
+ else
+ {
+ printf("mpu6050 init failed!\r\n");
+ }
+}
+
+/**
+ * @brief loop循环
+ *
+ */
+void loop()
+{
+
+ // if(success)
+ // {
+ // mpu.Read_All(&DataStruct);
+ // printf("gx:%d\r\n",DataStruct.Gx);
+ // printf("gy:%d\r\n",DataStruct.Gy);
+ // printf("gz:%d\r\n",DataStruct.Gz);
+ // }
+
+}
diff --git a/Core/Src/stm32f1xx_hal_msp.c b/Core/Src/stm32f1xx_hal_msp.c
new file mode 100644
index 0000000..4c15ad1
--- /dev/null
+++ b/Core/Src/stm32f1xx_hal_msp.c
@@ -0,0 +1,85 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32f1xx_hal_msp.c
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_AFIO_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
+ */
+ __HAL_AFIO_REMAP_SWJ_NOJTAG();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Core/Src/stm32f1xx_it.c b/Core/Src/stm32f1xx_it.c
new file mode 100644
index 0000000..b18e4af
--- /dev/null
+++ b/Core/Src/stm32f1xx_it.c
@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32f1xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32f1xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M3 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ {
+ }
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F1xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32f1xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Core/Src/syscalls.c b/Core/Src/syscalls.c
new file mode 100644
index 0000000..949dfbe
--- /dev/null
+++ b/Core/Src/syscalls.c
@@ -0,0 +1,155 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Core/Src/sysmem.c b/Core/Src/sysmem.c
new file mode 100644
index 0000000..08340bc
--- /dev/null
+++ b/Core/Src/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Core/Src/system_stm32f1xx.c b/Core/Src/system_stm32f1xx.c
new file mode 100644
index 0000000..481929d
--- /dev/null
+++ b/Core/Src/system_stm32f1xx.c
@@ -0,0 +1,406 @@
+/**
+ ******************************************************************************
+ * @file system_stm32f1xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+ *
+ * 1. This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
+ * factors, AHB/APBx prescalers and Flash settings).
+ * This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32f1xx_xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * 2. After each device reset the HSI (8 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
+ * the product used), refer to "HSE_VALUE".
+ * When HSE is used as system clock source, directly or through PLL, and you
+ * are using different crystal you have to adapt the HSE value to your own
+ * configuration.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32f1xx_system
+ * @{
+ */
+
+/** @addtogroup STM32F1xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32f1xx.h"
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F1xx_System_Private_Defines
+ * @{
+ */
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
+ This value can be provided and adapted by the user application. */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
+ This value can be provided and adapted by the user application. */
+#endif /* HSI_VALUE */
+
+/*!< Uncomment the following line if you need to use external SRAM */
+#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
+/* #define DATA_IN_ExtSRAM */
+#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
+
+/* Note: Following vector table addresses must be defined in line with linker
+ configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+ anywhere in Flash or Sram, else the vector table is kept at the automatic
+ remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+ in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F1xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F1xx_System_Private_Variables
+ * @{
+ */
+
+ /* This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+uint32_t SystemCoreClock = 16000000;
+const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
+#ifdef DATA_IN_ExtSRAM
+ static void SystemInit_ExtMemCtl(void);
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32F1xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system
+ * Initialize the Embedded Flash Interface, the PLL and update the
+ * SystemCoreClock variable.
+ * @note This function should be used only after reset.
+ * @param None
+ * @retval None
+ */
+void SystemInit (void)
+{
+#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
+ #ifdef DATA_IN_ExtSRAM
+ SystemInit_ExtMemCtl();
+ #endif /* DATA_IN_ExtSRAM */
+#endif
+
+ /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+ * or HSI_VALUE(*) multiplied by the PLL factors.
+ *
+ * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
+ * 8 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
+ * 8 MHz or 25 MHz, depending on the product used), user has to ensure
+ * that HSE_VALUE is same as the real frequency of the crystal used.
+ * Otherwise, this function may have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate (void)
+{
+ uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
+
+#if defined(STM32F105xC) || defined(STM32F107xC)
+ uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
+#endif /* STM32F105xC */
+
+#if defined(STM32F100xB) || defined(STM32F100xE)
+ uint32_t prediv1factor = 0U;
+#endif /* STM32F100xB or STM32F100xE */
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+ switch (tmp)
+ {
+ case 0x00U: /* HSI used as system clock */
+ SystemCoreClock = HSI_VALUE;
+ break;
+ case 0x04U: /* HSE used as system clock */
+ SystemCoreClock = HSE_VALUE;
+ break;
+ case 0x08U: /* PLL used as system clock */
+
+ /* Get PLL clock source and multiplication factor ----------------------*/
+ pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
+ pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
+
+#if !defined(STM32F105xC) && !defined(STM32F107xC)
+ pllmull = ( pllmull >> 18U) + 2U;
+
+ if (pllsource == 0x00U)
+ {
+ /* HSI oscillator clock divided by 2 selected as PLL clock entry */
+ SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
+ }
+ else
+ {
+ #if defined(STM32F100xB) || defined(STM32F100xE)
+ prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
+ /* HSE oscillator clock selected as PREDIV1 clock entry */
+ SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
+ #else
+ /* HSE selected as PLL clock entry */
+ if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
+ {/* HSE oscillator clock divided by 2 */
+ SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
+ }
+ else
+ {
+ SystemCoreClock = HSE_VALUE * pllmull;
+ }
+ #endif
+ }
+#else
+ pllmull = pllmull >> 18U;
+
+ if (pllmull != 0x0DU)
+ {
+ pllmull += 2U;
+ }
+ else
+ { /* PLL multiplication factor = PLL input clock * 6.5 */
+ pllmull = 13U / 2U;
+ }
+
+ if (pllsource == 0x00U)
+ {
+ /* HSI oscillator clock divided by 2 selected as PLL clock entry */
+ SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
+ }
+ else
+ {/* PREDIV1 selected as PLL clock entry */
+
+ /* Get PREDIV1 clock source and division factor */
+ prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
+ prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
+
+ if (prediv1source == 0U)
+ {
+ /* HSE oscillator clock selected as PREDIV1 clock entry */
+ SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
+ }
+ else
+ {/* PLL2 clock selected as PREDIV1 clock entry */
+
+ /* Get PREDIV2 division factor and PLL2 multiplication factor */
+ prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
+ pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
+ SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
+ }
+ }
+#endif /* STM32F105xC */
+ break;
+
+ default:
+ SystemCoreClock = HSI_VALUE;
+ break;
+ }
+
+ /* Compute HCLK clock frequency ----------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
+/**
+ * @brief Setup the external memory controller. Called in startup_stm32f1xx.s
+ * before jump to __main
+ * @param None
+ * @retval None
+ */
+#ifdef DATA_IN_ExtSRAM
+/**
+ * @brief Setup the external memory controller.
+ * Called in startup_stm32f1xx_xx.s/.c before jump to main.
+ * This function configures the external SRAM mounted on STM3210E-EVAL
+ * board (STM32 High density devices). This SRAM will be used as program
+ * data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmpreg;
+ /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
+ required, then adjust the Register Addresses */
+
+ /* Enable FSMC clock */
+ RCC->AHBENR = 0x00000114U;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
+
+ /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
+ RCC->APB2ENR = 0x000001E0U;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
+
+ (void)(tmpreg);
+
+/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
+/*---------------- SRAM Address lines configuration -------------------------*/
+/*---------------- NOE and NWE configuration --------------------------------*/
+/*---------------- NE3 configuration ----------------------------------------*/
+/*---------------- NBL0, NBL1 configuration ---------------------------------*/
+
+ GPIOD->CRL = 0x44BB44BBU;
+ GPIOD->CRH = 0xBBBBBBBBU;
+
+ GPIOE->CRL = 0xB44444BBU;
+ GPIOE->CRH = 0xBBBBBBBBU;
+
+ GPIOF->CRL = 0x44BBBBBBU;
+ GPIOF->CRH = 0xBBBB4444U;
+
+ GPIOG->CRL = 0x44BBBBBBU;
+ GPIOG->CRH = 0x444B4B44U;
+
+/*---------------- FSMC Configuration ---------------------------------------*/
+/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
+
+ FSMC_Bank1->BTCR[4U] = 0x00001091U;
+ FSMC_Bank1->BTCR[5U] = 0x00110212U;
+}
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
diff --git a/Core/Src/tim.c b/Core/Src/tim.c
new file mode 100644
index 0000000..6b17836
--- /dev/null
+++ b/Core/Src/tim.c
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file tim.c
+ * @brief This file provides code for the configuration
+ * of the TIM instances.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "tim.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+TIM_HandleTypeDef htim2;
+
+/* TIM2 init function */
+void MX_TIM2_Init(void)
+{
+
+ /* USER CODE BEGIN TIM2_Init 0 */
+
+ /* USER CODE END TIM2_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_OC_InitTypeDef sConfigOC = {0};
+
+ /* USER CODE BEGIN TIM2_Init 1 */
+
+ /* USER CODE END TIM2_Init 1 */
+ htim2.Instance = TIM2;
+ htim2.Init.Prescaler = 0;
+ htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+ htim2.Init.Period = 65535;
+ htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sConfigOC.OCMode = TIM_OCMODE_PWM1;
+ sConfigOC.Pulse = 0;
+ sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN TIM2_Init 2 */
+
+ /* USER CODE END TIM2_Init 2 */
+ HAL_TIM_MspPostInit(&htim2);
+
+}
+
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+ if(tim_baseHandle->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspInit 0 */
+
+ /* USER CODE END TIM2_MspInit 0 */
+ /* TIM2 clock enable */
+ __HAL_RCC_TIM2_CLK_ENABLE();
+ /* USER CODE BEGIN TIM2_MspInit 1 */
+
+ /* USER CODE END TIM2_MspInit 1 */
+ }
+}
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
+{
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(timHandle->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspPostInit 0 */
+
+ /* USER CODE END TIM2_MspPostInit 0 */
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**TIM2 GPIO Configuration
+ PA0-WKUP ------> TIM2_CH1
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN TIM2_MspPostInit 1 */
+
+ /* USER CODE END TIM2_MspPostInit 1 */
+ }
+
+}
+
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+ if(tim_baseHandle->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+ /* USER CODE END TIM2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM2_CLK_DISABLE();
+ /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+ /* USER CODE END TIM2_MspDeInit 1 */
+ }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Core/Src/usart.c b/Core/Src/usart.c
new file mode 100644
index 0000000..9e7d91e
--- /dev/null
+++ b/Core/Src/usart.c
@@ -0,0 +1,127 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file usart.c
+ * @brief This file provides code for the configuration
+ * of the USART instances.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "usart.h"
+
+/* USER CODE BEGIN 0 */
+#ifdef __GNUC__
+ #define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#else
+ #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
+#endif
+
+PUTCHAR_PROTOTYPE
+{
+ HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, HAL_MAX_DELAY);
+ return ch;
+}
+/* USER CODE END 0 */
+
+UART_HandleTypeDef huart1;
+
+/* USART1 init function */
+
+void MX_USART1_UART_Init(void)
+{
+
+ /* USER CODE BEGIN USART1_Init 0 */
+
+ /* USER CODE END USART1_Init 0 */
+
+ /* USER CODE BEGIN USART1_Init 1 */
+
+ /* USER CODE END USART1_Init 1 */
+ huart1.Instance = USART1;
+ huart1.Init.BaudRate = 115200;
+ huart1.Init.WordLength = UART_WORDLENGTH_8B;
+ huart1.Init.StopBits = UART_STOPBITS_1;
+ huart1.Init.Parity = UART_PARITY_NONE;
+ huart1.Init.Mode = UART_MODE_TX_RX;
+ huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+ if (HAL_UART_Init(&huart1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN USART1_Init 2 */
+
+ /* USER CODE END USART1_Init 2 */
+
+}
+
+void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
+{
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(uartHandle->Instance==USART1)
+ {
+ /* USER CODE BEGIN USART1_MspInit 0 */
+
+ /* USER CODE END USART1_MspInit 0 */
+ /* USART1 clock enable */
+ __HAL_RCC_USART1_CLK_ENABLE();
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**USART1 GPIO Configuration
+ PA9 ------> USART1_TX
+ PA10 ------> USART1_RX
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_9;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_10;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN USART1_MspInit 1 */
+
+ /* USER CODE END USART1_MspInit 1 */
+ }
+}
+
+void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
+{
+
+ if(uartHandle->Instance==USART1)
+ {
+ /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+ /* USER CODE END USART1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART1_CLK_DISABLE();
+
+ /**USART1 GPIO Configuration
+ PA9 ------> USART1_TX
+ PA10 ------> USART1_RX
+ */
+ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+ /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+ /* USER CODE END USART1_MspDeInit 1 */
+ }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Core/Startup/startup_stm32f103c8tx.s b/Core/Startup/startup_stm32f103c8tx.s
new file mode 100644
index 0000000..dbcda5d
--- /dev/null
+++ b/Core/Startup/startup_stm32f103c8tx.s
@@ -0,0 +1,364 @@
+/**
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
+ * @file startup_stm32f103xb.s
+ * @author MCD Application Team
+ * @brief STM32F103xB Devices vector table for Atollic toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M3 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m3
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF108F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+ bx lr
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M3. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_IRQHandler
+ .word TAMPER_IRQHandler
+ .word RTC_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_CAN1_TX_IRQHandler
+ .word USB_LP_CAN1_RX0_IRQHandler
+ .word CAN1_RX1_IRQHandler
+ .word CAN1_SCE_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_IRQHandler
+ .word TIM1_UP_IRQHandler
+ .word TIM1_TRG_COM_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word BootRAM /* @0x108. This is for boot in RAM mode for
+ STM32F10x Medium Density devices. */
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_IRQHandler
+ .thumb_set PVD_IRQHandler,Default_Handler
+
+ .weak TAMPER_IRQHandler
+ .thumb_set TAMPER_IRQHandler,Default_Handler
+
+ .weak RTC_IRQHandler
+ .thumb_set RTC_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_CAN1_TX_IRQHandler
+ .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
+
+ .weak USB_LP_CAN1_RX0_IRQHandler
+ .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
+
+ .weak CAN1_RX1_IRQHandler
+ .thumb_set CAN1_RX1_IRQHandler,Default_Handler
+
+ .weak CAN1_SCE_IRQHandler
+ .thumb_set CAN1_SCE_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_IRQHandler
+ .thumb_set TIM1_BRK_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_IRQHandler
+ .thumb_set TIM1_UP_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_IRQHandler
+ .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+
diff --git a/Debug/Core/Src/gpio.d b/Debug/Core/Src/gpio.d
new file mode 100644
index 0000000..0ceb548
--- /dev/null
+++ b/Debug/Core/Src/gpio.d
@@ -0,0 +1,55 @@
+Core/Src/gpio.o: ../Core/Src/gpio.c ../Core/Inc/gpio.h ../Core/Inc/main.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
+ ../Core/Inc/stm32f1xx_hal_conf.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
+../Core/Inc/gpio.h:
+../Core/Inc/main.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
+../Core/Inc/stm32f1xx_hal_conf.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
+../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
diff --git a/Debug/Core/Src/gpio.o b/Debug/Core/Src/gpio.o
new file mode 100644
index 0000000000000000000000000000000000000000..473b62f82706f677296611842cddc3a1523c2706
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