module comp (a,b,agb,aeb,alb);
    parameter n = 1;
    input[n-1:0] a;
    input[n-1:0] b;
    output agb,aeb,alb;

    assign agb = (a[n-1:0]>b[n-1:0]);
    assign aeb = (a[n-1:0]==b[n-1:0]);
    assign alb = (a[n-1:0]<b[n-1:0]);    
endmodule